; *********************************************************************** ; * * ; * Initialisation Routines for Push-button Program, First Version * ; * * ; *********************************************************************** ; Author: John Zaitseff ; Date: 28th May, 2003 ; Version: 1.2 ; This file contains the initialisation routines for the first version of ; the IRQ-enabled Push-button Switches program (pb-irq-v1.elf), as used in ; ELEC2041 Experiment 5. In particular, it contains the ARM processor ; exception vector table and the boot code that enables various hardware ; interrupts and sets the processor into User mode. .global _start ; "_start" is where the code starts running .extern main ; "main" is defined in another file .extern irq_handler ; "irq_handler" is also defined elsewhere .include "header-v3.s" ; Include various definitions ; ----------------------------------------------------------------------- ; The following code will be placed into the ".zeropage" section, NOT into ; the ".text" section. The GNU Linker will place the ".zeropage" section ; at address 0x0. .section .zeropage, "awx" ; For code located at address 0x00000000 _start: ; Start of the entire program ; ARM processor exception vector table ; The ARM processor exception vector table must appear at address 0x0. ; This particular table only handles the Reset and Interrupt exceptions; ; all other exceptions will NOT be handled correctly at all. ev00: b init ; Reset exception ev04: nop ; Undefined Instruction exception ev08: nop ; Software Interrupt exception ev0C: nop ; Prefetch Abort exception ev10: nop ; Data Abort exception ev14: nop ; (Not used) ev18: b irq_handler ; Interrupt exception ev1C: nop ; Fast Interrupt exception ; ----------------------------------------------------------------------- ; The following code will be placed into the ".ospage" section, NOT into ; the ".text" section. The GNU Linker will place the ".ospage" section at ; address 0x1000. .section .ospage, "awx" ; For "operating system" code ; Initialisation routine ; This routine is run at processor reset. It initialises the hardware ; interrupts corresponding to push-button switches S2 and S3, then changes ; the ARM processor into User mode with the Fast and normal interrupts ; enabled. init: ; Initialise hardware and change to User mode ldr r0, =iobase ; R0 = base of Microcontroller I/O space mov r1, #(irq_pbs2 | irq_pbs3) ; R1 = enable IRQs mask for S2/S3 strb r1, [r0, #irq_enable] ; Actually enable the IRQs mrs ip, cpsr ; Get current value of CPSR into IP (R12) bic ip, ip, #(ARM_PSR_i | ARM_PSR_f | ARM_PSR_mode_mask) ; Mask out bottom 5 bits. Also clear I and F ; bits; this enables the interrupts orr ip, ip, #ARM_PSR_mode_usr ; Set User mode msr cpsr, ip ; Actually make the changes to CPSR b main ; Now in User mode; jump to the main program .end